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I just enabled ASTC on Tegra with, effectively, one line of code and got it right on the first try.

Do you have any idea how amazing this is?

You know. ASTC. The one format that has a non-power-of-two block size. The only format group NVIDIA supports where the block size isn't square.

First try. Every single Vulkan CTS test for ASTC passes.

On Intel, getting ASTC working was utter hell. We had so many image layout bugs. Block sizes of 4 were assumed all over everywhere. There were x/y mixups that only mattered for non-square blocks. The whole cooncept of a non-power-of-two didn't exist. Our block compressed format handling was also just plumb wrong.

Then Lina and I wrote ISL and put a lot of time and thought into how we do layout calculations to avoid a lot of the anti-patterns in the old code. Everything has units. Everything is an isl_extent4d and those have helpers so you aren't banging on them manually. We carefully ensured that the calculation flow only went one direction and we never multiplied and then divided it back out later. ISL fixed so many bugs.

With NVK, I wrote NIL which was based on our learnings from ISL. After Daniel helped me port NIL to Rust, I took it a step further and encoded the units in Rust types instead of just suffixes on variable names. This means you have to go out of your way to ever screw up a unit conversion.

The result is ASTC in one line of code.

Another week. Another LLM MR that makes no sense and burns maintainer time. Could we all please just stop with this?

Train seat assignment is a register allocation problem. In this essay I will...

Do you have any idea how embarrassing it is when someone from a multi-billion dollar company is like, "We're being on open-source to do this."

You realize it's just like this one guy, right? A guy who's not even really getting paid for it. And you have billions.

Like, maybe you could fund some of that work? Just a thought...

Mesa is working to update our contributor guide. Can you guess why?

Did you guess AI?

Because if you did, you'd be right. I don't want to put anyone on blast here so please don't go digging to find the motivating MR and harass the contributor or anything like that.

But the situation was exactly what you might think. Someone ran ChatGPT on the code and asked it for suggestions on making it more performant. They applied a bunch of the changes against their local branch, tested it, and found that it gave maybe a 0.5-1.0% perf boost in some titles.

That's totally fine. I don't care what tools you use to find a bottleneck. I'll happily take more FPS, no matter who found the issue or how. If some AI assistant helps you find things no one else has found and lets us make drivers faster, great!

But that's not what happened.

What happened next is that they then tried to make it the Mesa project maintainers' job to sort through the shit ChatGPT spit out and decide what's useful and what's not and why the changes helped and whether or not they were correct. The contributor had no no idea and, more importantly, they had no desire to actually learn about the Mesa code-base or the hardware in question. They just wanted to run ChatGPT and send its suggestions towards upstream.

This is not useful. This is not contributing. It's just burning maintainer time sorting through AI hallucinations. We have enough mediocre code to review that comes from actual humans who are actually trying to learn about Mesa and help out. We don't need to add AI shit to the merge request pile. If you don't understand the patch well enough to be able to describe what it does and why it makes things faster, don't submit it.

So now we're making it really clear: If you submit the merge request, you're responsible for the code change as if you typed it yourself. You don't get to claim ignorance and "because the AI said so". It's your responsibility to do due diligence to make sure it's correct and to accurately describe the change in the commit message.

Some things shouldn't have to be explicitly written down but here we are... 😩