I aim for ♀️♂️ parity in my timeline: I follow back men and women in alternation.
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I aim for ♀️♂️ parity in my timeline:
I follow back men and women in alternation. If I don’t follow you back right away, it’s only because I haven’t yet found enough women to balance things out. There are so many more men here than women (science/tech bubble..)
What do my peers do? #WomeninSTEM #science #SciComm -
I aim for ♀️♂️ parity in my timeline:
I follow back men and women in alternation. If I don’t follow you back right away, it’s only because I haven’t yet found enough women to balance things out. There are so many more men here than women (science/tech bubble..)
What do my peers do? #WomeninSTEM #science #SciComm@helenajambor I hear you 🥲
I recommend @janeadams if you aren’t following her already…
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@helenajambor I hear you 🥲
I recommend @janeadams if you aren’t following her already…
@_elena of course I am, her advisor is a colleague :) - but found you now! how come you know Bruno!
Gli ultimi otto messaggi ricevuti dalla Federazione
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@tip through patience!
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@ulisse62 mi domando anche io cosa si aspetti a rendersi conto che i sistemi informatici non possono essere allegramente appartati a terzi, magari di potenze straniere, per non aver la seccatura di (a) dover istruire una generazione a saperli creare, gestire, difendere e (b) appunto difenderli come asset strategici!
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@lgeurts true, analysis paralysis can be a heavy burden
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New level of content laziness encountered - why not *include the prompt you gave the AI* at the start of the article, as well as the slop generated content itself 🤦
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@Mohammedjhad Amazing idea, Mohammed! 🙂❤️
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@joynewacc Thank you so much for your contributions, Joy. 💕 You're a fantastic addition to Aral's efforts. ❤️
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@derSammler those are good examples of Ball Grid Array and Land Grid Array, e.g. BGA and LGA cores. The BGA page has examples of many sub-types, and links to the other primary designs, kinda worth a look:
https://en.wikipedia.org/wiki/Ball_grid_array
There's so much fun to be had with old CPU collections, especially vintage alternate types like the Alpha. Sun UltraSparc and PowerPC from the same era also have some beautiful examples.
That DS15 CPU is a classic (https://en.m.wikipedia.org/wiki/Alpha_21264), very interesting early example of using branch prediction calculations to accelerate cache reads vs suffering potential cycle penalties and stack eviction.
> The predictor was used as the Alpha 21264 has a minimum branch misprediction penalty of seven cycles. Due to the instruction cache's two cycle latency and the instruction queues, the average branch misprediction penalty is 11 cycles. The algorithm maintains two history tables, Local and Global...
> The local predictor consists of a 1,024-entry by 10-bit branch history table... Each entry is a 3-bit saturating counter. The value of the counter determines whether the current branch is taken or not taken.
> The global predictor is a single-level, 4096-entry branch history table. Each entry is a 2-bit saturating counter; the value of this counter determines whether the current branch is taken or not taken.
ok ok, enough of this nerdery. there are Alpha 21264 CPUs on eBay if anyone wants to own a piece of this wonderful engineering. https://ebay.us/m/ttryzO
